1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having improved isolation structures and/or characteristics, and a method for fabricating the same.
2. Discussion of the Related Art
Generally, a semiconductor device comprises a plurality of electrical devices, such as transistors, diodes and capacitors, on a semiconductor substrate. In this case, it is necessary for the semiconductor device to have an electrical device isolation layer. With high integration in the semiconductor device, the size of the electrical devices is scaled below a nano degree. Thus, the device isolation layer should have high isolation characteristics.
Hereinafter, a semiconductor device according to the related art will be described with reference to the accompanying drawings.
FIG. 1 is a cross sectional view of an isolation structure in a semiconductor device according to the related art.
As shown in FIG. 1, a p-type well 12 and an n-type well 13 are formed at a predetermined depth in a semiconductor substrate 11. Also, an STI layer 14 is formed in a predetermined portion of the semiconductor substrate 11. The STI layer 14 helps to electrically isolate the p-type well 12 and the n-type well 13 from each other. Also, the STI layer 14 divides each of the p-type and n-type wells 12 and 13 into an active region and a field region.
In the p-type well 12, a plurality of n-type layers 15 are formed and are isolated from one another at least in part by the STI layers 14. In the n-type well 13, a plurality of p-type layers 16 are formed and are isolated at least in part from one another by the STI layers 14.
In the semiconductor device, various factors such as the depth of the STI layer 14, the width of the STI layer 14, the characteristics of gap-fill oxide layer in the STI layer 14, the lateral slope of the STI layer 14, the p-type well and n-type well doping profile, and the lower doping profile of the STI layer 14 have an effect on the isolation characteristics (that is, the isolation characteristics between the adjacent n-type layers 15, the isolation characteristics between the adjacent p-type layers 16, and the latch-up characteristics between the n-type layer 15 and the p-type layer 16 adjacent to each other). Especially, the lower doping profile of the STI layer 14 has a great effect on the isolation characteristics.
However, in the method for fabricating the semiconductor device according to the related art, the wells and regions are divided primarily by the STI layers 14, which may cause a deterioration in the isolation characteristics. For example, a leakage current may be generated in the semiconductor device. As a result, the operation characteristics of the semiconductor device may deteriorate due to the leakage current.
Although not shown, when forming the p-type well 12 and the n-type well 13 to enhance the isolation characteristics in the semiconductor device, the doping density is increased by implanting field stop ions and channel stop ions into the entire surface of the semiconductor substrate.
As impurity ions are implanted into the entire surface of the semiconductor substrate during field stop ion implantation and channel stop ion implantation, the doping density of the p-type well 12 and the n-type well 13 also increases, which may deteriorate the junction diode characteristics. Thus, as a threshold voltage Vth of MOS transistor is rising, it may cause a limit on the increase of the density of the field channel stop ions.